Semiconductor laser diode chip and its positoning and mouting method

ABSTRACT

Positioning marks  15, 16  are formed at predetermined positions with respect to an active layer  11  buried in an LD chip body  10.  In an Au metallized layer  12  for solder joining on the active layer  11,  marks  17, 18  for measurement are precisely formed by the same mask with which the positioning marks  15, 16  are formed. The marks  17, 18  for measurement are arranged closer to the active layer  11  in comparison with the positioning marks  15, 16.  Therefore, the distances between the active layer  11  and the marks  17, 18  for measurement can be respectively measured with high accuracy. In mounting of the LD chip to a substrate in a passive alignment technique, relative positions of the active layer and the positioning marks are measured in advance with high accuracy and the LD chip can be mounted to the substrate by correcting both the relative positions. Thus, the LD chip is positioned with high accuracy to be mounted to the substrate. The LD chip and an optical waveguide, or an optical fiber arranged in the substrate, can be coupled to each other with high coupling efficiency.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor laser diode chip(an LD chip), and to a method for mounting this semiconductor laserdiode chip onto a substrate. In particular, the present inventionrelates to an LD chip and its mounting method suitable for a passivealignment technique without performing optical coupling to an opticalwaveguide and an optical fiber by emitting light from the LD chip.

[0003] 2. Description of the Related Art

[0004] An LD chip is, conventionally, optically coupled to an opticalwaveguide formed on a substrate, or to an optical fiber arranged on thesubstrate by monitoring intensity of light outputted from the opticalfiber in an oscillating state of the LD chip, and performing apositioning operation such that the light intensity is maximized.However, it is necessary to flow an electric current through the LD chipto oscillate the LD chip. Further, productivity is low since it is alsonecessary to make a position adjustment while the light intensityoutputted from the optical fiber is monitored. In particular, when theLD chip is optically coupled to the optical waveguide and an adjustingmechanism is arranged, the structure becomes complicated and it isdifficult to monitor in advance light outputted from the opticalwaveguide.

[0005] Therefore, mainly in a module in which the LD chip and theoptical waveguide are optically coupled to each other, the considerationof an assembly technique called a passive alignment mounting techniqueis forwarded instead of the above method to reduce the number ofassembly works. For example, a construction described in U.S. Pat. No.5,414,787 is known as a construction relative to positioning of the LDchip and its mounting method by the passive alignment technique. In thepassive alignment technique, a coupling technique of the LD chip and theoptical fiber is constructed by fixedly mounting a semiconductor laserand the optical fiber at respective predetermined positions, and it isnot necessary to adjust an optical axis. Accordingly, it is notnecessary to oscillate the LD chip in the passive alignment technique,either. However, in any technique, it is normally necessary to perform amounting operation with sub-μm accuracy to couple with sufficientefficiency the semiconductor laser and the optical fiber to each other.

[0006] In the LD chip used in the mounting method using the conventionalpassive alignment technique, a positioning mark is formed on asubstrate-side face of the LD chip. This mark is normally formed of ametallized layer. In the mounting method of the LD chip using thepassive alignment technique, it is necessary to accurately recognize theposition of an active layer buried in a semiconductor laser body tomount the LD chip to the substrate with high accuracy.

[0007] No active layer can be normally confirmed directly by its outwardappearance. Therefore, a positioning mark is formed on a surface of theLD chip body. The LD chip is positioned by confirming the positioningmark. Accordingly, relative position accuracy of the positioning mark tothe active layer is very important in the passive alignment.

[0008] However, at a position facing the active layer, it is necessaryto perform solder joining to a heat sink such as a silicon (Si)substrate in order to radiate heat. Accordingly, an Au metallized layer2 for the solder joining is formed in the position facing the activelayer. Therefore, it is difficult to pattern a mark requiring a certainwide area such as the positioning mark. Accordingly, in the conventionalLD chip, the distance between the positioning mark and the active layeris as far as 50 μm to100 μm.

[0009] A method of directly measuring position accuracy by observing asection of the LD chip body is most accurate to confirm the relativepositions of the active layer of the LD chip and the positioning mark ofthe LD chip. However, in the conventional LD chip, since the distancebetween the positioning mark and the active layer is 50 μm to 100 μm, ameasurement error in measuring the relative position accuracy of thepositioning mark to the active layer is as large as 2 to 3 μm, or more.Therefore, no sufficient recognizing accuracy can be obtained withrespect to mounting using the passive alignment technique requiringsub-μm accuracy.

SUMMARY OF THE INVENTION

[0010] An object of a mounting method of an LD chip of the presentinvention is to make it possible to mount the LD chip to a substratewith high positioning accuracy by a passive alignment technique.

[0011] To achieve the above object, in a mounting method of an LD chipin the present invention, a positioning mark is formed in apredetermined position with respect to an active layer on the surface ofan LD chip body in which the active layer is buried. In the LD chip, amark for measuring relative position of the active layer to thepositioning mark is positioned in the vicinity of the active layer onthe body surface with respect to the positioning mark in a metalliclayer.

[0012] More concretely, in the mounting method of the LD chip formounting the semiconductor laser diode chip (LD chip) having the activelayer to a substrate in its predetermined position, the semiconductorlaser diode has a mark for measurement (first mark) formed in thevicinity of the active layer and a mark for positioning (second mark)that is provided for positioning with respect to the substrate. On theother hand, the substrate has a substrate-side positioning mark in aposition opposed to the mark for measurement when the LD chip isarranged at the predetermined position. A position relation between theactive layer and the mark for measurement of the LD chip is made clearby measurement in advance. Next, the LD chip is arranged on thesubstrate so that the mark for measurement and the substrate side markare opposed to each other. The LD chip is fixed to the substrate whilecorrecting a position of the LD chip on the basis of the above positionrelation.

[0013] Here, the mark for measurement may be arranged just above theactive layer, or may be arranged just above the active layer and may beformed to have approximately the same width as that of the active layer.Otherwise, the mark for measurement may be constructed by forming ametallic layer, etc. in plural thin parallel straight lines. Further, apair of positioning marks may be arranged in predetermined positionsbetween which the active layer is located, and a pair of marks formeasurement may be arranged with respect to the pair of positioningmarks.

[0014] The positioning mark may be constructed by a mark for mounting inthe passive alignment technique, or may be constructed by a mark formedby a metallic layer for solder joining, etc.

[0015] In the above mounting method, the substrate has a V-groove thecenter of which coincides with the central axis of the active layer. TheLD chip and an optical fiber can be optically coupled to each other onthe substrate with high efficiency by arranging the optical fiber inthis V-groove.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and other objects, features and advantages of thepresent invention will become more apparent from the following detaileddescription when taken in conjunction with the accompanying drawingswherein:

[0017]FIG. 1 is a plan view showing the structure of an LD chip used ina conventional mounting method of the LD chip;

[0018]FIG. 2 is a cross-sectional view of the LD chip shown in FIG. 1;

[0019]FIG. 3 is a plan view showing the structure of a first embodimentof the LD chip used in a mounting method of the LD chip of the presentinvention;

[0020]FIG. 4 is a cross-sectional view of the LD chip shown in FIG. 3;

[0021]FIG. 5 is a plan view showing the structure of a second embodimentof an LD chip used in a mounting method of the LD chip of the presentinvention;

[0022]FIG. 6 is a plan view showing the structure of a third embodimentof an LD chip used in a mounting method of the LD chip of the presentinvention;

[0023]FIG. 7 is a cross-sectional view of the LD chip shown in FIG. 6;

[0024]FIG. 8 is a view showing a state of an LD chip mounted to asubstrate;

[0025]FIG. 9 is a view showing a positioning process of an LD chip in amounting method of the LD chip of the present invention; and

[0026]FIG. 10 is a view showing a positioning process of an LD chip in amounting method of the LD chip of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] A conventional mounting method of an LD chip in a passivealignment technique will first be explained so as to make the inventioneasily understood before an LD chip and its mounting method of thepresent invention are explained.

[0028] The passive alignment technique is a method for opticallycoupling the LD chip and an optical fiber by mounting and fixing asemiconductor laser and the optical fiber in respective predeterminedpositions. Accordingly, it is not necessary to oscillate the LD chip inthe passive alignment technique. It is normally necessary to mount theLD chip to a substrate with sub-μm accuracy to couple with sufficientefficiency the LD chip and the optical fiber to each other.

[0029] Here, the conventional mounting method of the LD chip in thepassive alignment technique will be explained.

[0030]FIGS. 1 and 2 respectively show a plan view and a cross-sectionalview of a conventional LD chip in the passive alignment technique. Ineach of these figures, reference numeral 10 designates a body of asemiconductor laser diode having a predetermined layer structure.Reference numeral 1 designates an active layer. Reference numerals 2, 3and 4 designate Au (gold) metallized layers. Reference numerals 5 and 6designate positioning marks. It is necessary to accurately recognize aposition of the active layer 1 buried in the semiconductor laser body inorder to perform such mounting with high accuracy by the passivealignment technique.

[0031] No active layer 1 can be normally confirmed directly by itsoutward appearance. Therefore, there is a known mounting method in whichthe marks 5 and 6 for positioning are formed on a surface of the diodebody 10, and the semiconductor laser is positioned by confirming themarks 5 and 6 for positioning. Accordingly, relative position accuracyof the positioning marks 5, 6 and the active layer 1 is very importantin the passive alignment.

[0032] However, the distances between the positioning marks 5, 6 and theactive layer 1 in the conventional LD chip are distant as far as 50 μmto 100 μm. It is necessary to perform solder joining to a heat sink suchas a silicon (Si) substrate, at a position facing the active layer inorder to radiate heat. An Au metallized layer 2 for the solder joiningis formed in the position facing the active layer 1. Therefore, it isdifficult to pattern a mark requiring a certain wide area such as thepositioning marks 5, 6.

[0033] A method for directly measuring position accuracy by observing asection of the LD chip body is most accurate to confirm the relativepositions of the active layer 1 and the positioning marks 5, 6 of the LDchip. However, in the conventional LD chip, as shown in FIGS. 1 and 2,the positioning marks 5, 6 are respectively distant from the activelayer 1 by 50 μm to 100 μm. Therefore, a measurement error in measuringthe relative position accuracy of the positioning marks 5, 6 and theactive layer 1 is as large as 2 to 3 μm, or more. Accordingly, nosufficient recognizing accuracy can be obtained in mounting using thepassive alignment technique requiring sub-μm accuracy.

[0034] A mounting method of the LD chip of the present invention willnext be explained.

[0035]FIG. 3 is a plan view showing the structure of a first embodimentof the LD chip used in the mounting method of the LD chip of the presentinvention.

[0036] A method for directly measuring position accuracy by observing asection of the LD chip is most reliable to confirm the relativepositions of an active layer 11 of the LD chip and positioning marks 15,16. In the LD chip in this embodiment, marks 17, 18 for measurement areformed on a surface of the LD chip in the vicinity of the active layer11 together with the positioning marks 15, 16.

[0037] In FIGS. 3 and 4, the active layer 11 for emitting a laser beamis formed within an LD chip body 20. The marks 17, 18 for measurementare formed in an Au metallized layer 12 in the vicinity of the activelayer 11. The marks 17, 18 for measurement can be formed without havingany influence on the solder joining since each of these marks issufficiently constructed by a thin straight line of e.g., about 5 μm inwidth. These marks 17, 18 for measurement can be formed by the sameprocess for forming the positioning marks 15, 16. The marks 17, 18 formeasurement and the positioning marks 15, 16 are formed by using thesame mask in a manufacturing process of the LD chip, so that relativepositions with high accuracy ranging from 0.1 to 0.2 μm can be realized.

[0038] Accordingly, if the relative positions of the marks 17, 18 formeasurement to the active layer 11 are measured, it is possible toobtain the result similar to those in a case in which relative positionsof the positioning marks 15, 16 to the active layer 11 are measured. Theactive layer 11 can be located in the same position at any time, evenwhen the LD chip is mounted by using the positioning marks 15, 16, byadjusting a mounting position of the LD chip in accordance with therelative position of the active layer 11 to the marks 17, 18 formeasurement. For example, when the position of the active layer 11 isshifted by 1 μm from the marks 17, 18 for measurement in a directionperpendicular to the active layer 11, the position of the active layer11 can be compensated at a position provided in accordance with adesigned value by mounting the LD chip so as to shift the positioningmarks 15, 16 by 1 μm onto the opposite side in mounting the LD chip.

[0039] The relative positions of the active layer 11 and the marks 17,18 for measurement are directly measured by observing a section of theLD chip. After the LD chip extracted from a wafer is cut in section, anend face of the LD chip is etched so that an active layer portion isrecessed and the position of the active layer 11 can be recognized Themarks 17, 18 for measurement are patterned with Au (gold) on a surfaceof the LD chip, so that the position of the active layer 11 can beconfirmed by a level difference of an Au metallized layer 12 in a markportion for measurement as shown in FIG. 4. The relative positions aremeasured by using an equipment such as an SEM, which is able to take adistance measurement with high accuracy while the active layer 11 andthe marks 17, 18 for measurement are simultaneously observed.

[0040] When the marks 17, 18 for measurement are arranged on both sidesof the active layer 11 as shown in FIG. 3, an error in absolute value atmeasuring time can be corrected by designing the LD chip such that theactive layer 11 is located in the central position between the marks 17and 18 for measurement on both sides. First, the distance between themark 17 for measurement and the active layer 11, and the distancebetween the mark 18 for measurement and the active layer 11 arerespectively measured. Thus, the distance between the marks 17 and 18for measurement is measured in advance. The marks 17 and 18 formeasurement are formed in accordance with mask accuracy at the time offormation in a semiconductor process. Therefore, when the distancebetween the marks 17 and 18 for measurement is designed to have 10 μm,the actual value of this distance is approximately 10 μm.

[0041] Here, for example, when the measured value of this distance is10.5 μm, it turns out that the measured value by a used measuringtechnique is reduced by about 3% down to 10/10.5.

[0042] Next, the distance between the mark 17 for measurement and theactive layer 11, and the distance between the mark 18 for measurementand the active layer 11 are respectively multiplied by the correctionvalue 10/10.5 previously calculated so that true values of thesedistances can be calculated. The actual relative positions of the marksfor measurement and the active layer can be finally calculated bycomparing the distance between the mark 17 for measurement and theactive layer 11, and the distance between the mark 18 for measurementand the active layer 11 which are calculated by the correction values.

[0043] The transversal distance between the active layer 11 and each ofthe marks for measurement can be actually set to a value equal to orsmaller than 5 μm. Therefore, the relative positions can be measuredwith an error of about 0.2 to 0.3 μm even when measuring accuracy is setto 5%. This error amount is equal to or smaller than {fraction (1/10)}times an error amount obtained in the case that measurement is madeusing the positioning marks 15, 16. Accordingly, the measuring accuracycan be remarkably improved.

[0044] The relative positions of the marks for measurement and theactive layer are measured by sampling some from the same wafer of the LDchip. A relative position of the active layer and a surface patternwithin the same wafer is very uniform in a manufacturing process of theLD chip. Therefore, if some within the wafer are sampled and positionaccuracy is grasped, this position accuracy can be considered as thesame accuracy also in the other LD chips within the same wafer.Accordingly, shifting amounts of the relative positions of the activelayer and the marks for measurement are considered as the same withinthe wafer, so that these shifting amounts can be used as offsets in themounting of the LD chip.

[0045] When the marks for measurement are formed, the marks formeasurement are only added to a mask pattern for forming the positioningmarks. Accordingly, this addition can be realized without having anyinfluence on the manufacturing process of the LD chip. Therefore, themarks for measurement can be formed without reducing productivity of theLD chip.

[0046] In this embodiment, the marks for measurement are formed of thinstraight lines, but can be formed in various shapes as long as it doesnot influence the solder joining. These marks for measurement can besimilarly used since a level difference in Au metallized is also causedwhen the marks have an arbitrary shape except for the straight line,such as a circular shape and a square shape. The absolute value can bealso naturally corrected by forming the marks for measurement on bothsides of the active layer.

[0047] A second embodiment of a mounting method of an LD chip of thepresent invention will next be explained.

[0048]FIG. 5 shows the second embodiment of the mounting method of theLD chip of the present invention. As shown in FIG. 5, shifting amountsof the relative positions of positioning marks 15, 16 to an active layer11 can be easily grasped by arranging a mark 19 for measurement justabove the active layer 11. Further, relative position accuracy can befurther easily grasped if a width of the mark 19 for measurement is setto be equal to a width of the active layer 11.

[0049]FIGS. 6 and 7 show a third embodiment of a mounting method of anLD chip of the present invention. A mark 21 for measurement isconstructed by plural thin straight lines arranged in parallel with eachother so that the shifting amounts can be more reliably measured. Asshown in FIG. 6, when the mark 21 for measurement is formed by arrangingplural thin straight lines in parallel with each other, a section of theLD chip is formed stepwise as shown in FIG. 7. A level difference isonly about 0.4 μm in the mark for measurement formed by Au metallizedlayer. Therefore, when the relative position is measured using one ofsteps as reference, there is a possibility that no level difference canbe recognized from a certain cause. However, the level difference can bereliably recognized by forming plural straight lines as the mark 21 formeasurement. Accordingly, the relative position of the mark formeasurement to the active layer can be reliably measured. Naturally, themark 21 for measurement is not limited to the plural thin straightlines, but shape of the mark for measurement is not particularly limitedif this shape is a shape capable of forming plural level differences.

[0050] A mounting procedure in the mounting method of the LD chip of thepresent invention will next be explained.

[0051]FIG. 8 is a view showing a state of the LD chip mounted to asubstrate. In this embodiment, a V-groove 42 for arranging an opticalfiber (illustration thereof is omitted) is formed in advance on asilicon substrate 40 by wet etching. An AuSn soldering layer 43 formounting the LD chip 41 is formed on a substrate surface on theextension line of the V-groove 42. In this embodiment, the AuSnsoldering layer 43 has an area larger than that of an active layer(illustration thereof is omitted) and a rectangular shape. After the LDchip 41 is mounted, the AuSn soldering layer 43 is formed at a positionjust below the active layer.

[0052] Positioning marks 44, 45 on the substrate side are formed on bothsides of the AuSn soldering layer 43. Marks 37, 38 for measurement whichare already explained are formed on the substrate-side face of the LDchip 41 (not shown in the drawings).

[0053]FIGS. 9 and 10 are views each showing positioning of the LD chipin the mounting method of the LD chip of the present invention. FIGS. 9and 10 respectively show states before and after a position correction.

[0054] First, the LD chip is arranged on the substrate such that themarks 35, 36 for positioning in the LD chip and the positioning marks44, 45 on the substrate side form a predetermined relation. Here, sinceboth the positioning marks employ circular marks, the LD chip ispositioned such that centers of these marks are in conformity with eachother as shown in FIG. 9. Here, if the marks 35, 36 for positioning inthe LD chip are formed at predetermined positions with respect to anactive layer 31, the active layer 31 completely coincides with thecentral axis of the V-groove 42 when the LD chip is mounted and fixed tothe be substrate as it is.

[0055] However, as shown in FIG. 9, when the marks 35, 36 forpositioning are shifted relatively to the right-hand side with respectto the active layer 31 seen from above in this figure, the LD chip isshifted to the left-hand side from a position of the central axis of theV-groove 42 if the LD chip is fixed as it is.

[0056] Therefore, the LD chip is moved to a position shifted by Δ to theright-hand side from the above position and is mounted and fixed in thisstate. Thus, the active layer 31 can completely coincides with thecentral axis of the V-groove 42.

[0057] As explained above, in accordance with the present invention, amark for measurement which is positioned with respect to a positioningmark is arranged in a metallic layer in the vicinity of the active layerin the LD chip for a passive alignment, etc. A relative positions of theactive layer and the positioning mark of the LD chip can be preciselymeasured by the mark for measurement.

[0058] Further, shifting amounts of relative positions of thepositioning mark and the active layer can be easily grasped by arrangingthe mark for measurement just above the active layer. Further, relativeposition accuracy can be more easily grasped by setting a width of themark for measurement to be equal to a width of the active layer.

[0059] A level difference can be reliably recognized by forming with ametallic layer a plurality of thin parallel straight lines as the markfor measurement so that the relative position of the mark formeasurement to the active layer can be reliably measured. Thus, the LDchip can be mounted by correcting the relative positions so that the LDchip is positioned with high accuracy to be mounted to the substrate.The LD chip and an optical waveguide, or an optical fiber arranged inthe substrate, can be coupled to each other with high couplingefficiency.

[0060]FIG. 8 shows a construction for coupling the LD chip to theoptical fiber arranged in the substrate. However, the coupling can besimilarly performed when the LD chip is mounted to the optical waveguideformed in the substrate instead of the optical fiber.

[0061] While this invention has been described in connection withcertain preferred embodiments, it is to be understood that the subjectmatter encompassed by way of this invention is not to be limited tothose specific embodiments. On the contrary, it is intended for thesubject matter of the invention to include all alternative, modificationand equivalents as can be included within the spirit and scope of thefollowing claims.

What is claimed is:
 1. A semiconductor laser diode chip comprising: afirst mark formed at a predetermined position with respect to an activelayer on a face opposed to a substrate to which the chip is mounted; anda second mark that satisfies a predetermined relative position relationto said first mark and is positioned oppositely to a substrate-side markformed on said substrate at mounting time to said substrate.
 2. Asemiconductor laser diode chip as claimed in claim 1, wherein said firstmark is constructed by a thin line pattern formed along said activelayer in the vicinity of this active layer.
 3. A semiconductor laserdiode chip as claimed in claim 2, wherein said thin line pattern isconstructed by a metallic film formed in plural thin parallel straightlines.
 4. A semiconductor laser diode chip as claimed in claim 1,wherein said first mark is constructed by a thin line formed on an upperportion of said active layer.
 5. A semiconductor laser diode chip asclaimed in claim 4, wherein said mark for measurement has approximatelythe same width as that of said active layer.
 6. A semiconductor laserdiode chip as claimed in claim 1, wherein said second mark isconstructed by a pair of marks formed on both sides of said activelayer.
 7. A semiconductor laser diode chip as claimed in claim 6,wherein said second mark has a circular shape.
 8. A semiconductor laserdiode chip as claimed in claim 7, wherein said substrate side mark has acircular shape having a diameter different from that of said secondmark.
 9. A semiconductor laser diode chip as claimed in claim 1, whereina plurality of said substrate side marks and a plurality of said secondmarks are formed, respectively.
 10. A mounting method of a semiconductorlaser diode chip having an active layer, for mounting the SEMICONDUCTORLASER DIODE chip to a substrate at its predetermined position; saidsemiconductor laser diode comprising: a first mark formed in thevicinity of said active layer; and a second positioning mark withrespect to said substrate; said substrate having a substrate side markformed at a position opposed to said second mark when said semiconductorlaser diode chip is arranged in the predetermined position; the mountingmethod including: a process for measuring a position relation of saidactive layer and said second mark; a process for setting said secondmark and said substrate side mark to be opposed to each other andarranging said semiconductor laser diode chip in said substrate; and aprocess for correcting the position of said semiconductor laser diodechip on the basis of said position relation and fixing saidsemiconductor laser diode chip to said substrate.
 11. A mounting methodof a semiconductor laser diode chip as claimed in claim 10, wherein saidsecond mark is constructed by a thin line pattern formed along saidactive layer in the vicinity of this active layer.
 12. A mounting methodof a semiconductor laser diode chip as claimed in claim 11, wherein saidthin line pattern is constructed by a metallic film formed in pluralthin parallel straight lines.
 13. A mounting method of a semiconductorlaser diode chip as claimed in claim 10, wherein said second mark isconstructed by a thin line formed at an upper portion of said activelayer.
 14. A mounting method of a semiconductor laser diode chip asclaimed in claim 13, wherein said second mark has approximately the samewidth as that of said active layer.
 15. A mounting method of asemiconductor laser diode chip as claimed in claim 9, wherein said firstmark is constructed by a pair of marks formed on both sides of saidactive layer.
 16. A mounting method of a semiconductor laser diode chipas claimed in claim 15, wherein said first mark has a circular shape.17. A mounting method of a semiconductor laser diode chip as claimed inclaim 15, wherein said substrate side mark has a circular shape having adiameter different from that of said second mark.
 18. A mounting methodof a semiconductor laser diode chip as claimed in claim 10, wherein eachof said first and second marks is constructed by a metallic thin filmand is formed by the same process.
 19. A mounting method of asemiconductor laser diode chip as claimed in claim 10, wherein saidsubstrate has a V-groove the center of which coincides with the centralaxis of said active layer.
 20. A mounting method of a semiconductorlaser diode chip as claimed in claim 10, wherein a plurality of saidsubstrate side marks and a plurality of said second marks are formed,respectively.